• Suche: "Reconfigurable Computing Systems and Design Methods"

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21

Design of Low-Power Structural FIR Filter Using Data-Driven Clock Gating and Multibit Flip-Flops
Lamjed Touil ; A. Hamdi ; Ismail Gassoumi ; et al.
Journal of Electrical and Computer Engineering, Vol 2020 (2020)

Parallel computing Computer engineering. Co... Phase-Locked Loops in Hi... Biomedical Engineering Clock skew Jitter …
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22

Generating Systolic Array Accelerators With Reusable Blocks
Liancheng Jia ; Liqiang Lu ; Xiaochen Wei ; et al.
IEEE Micro. 40:85-92

Parallel computing Computer Networks and Co... System-Level Design 02 engineering and techn... Very-large-scale integra... 7. Clean energy …
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23

NOCA — A Notification-Oriented Computer Architecture: Prototype and Simulator
Robson R. Linhares ; Leonardo Faix Pordeus ; Jean Marcelo Simão ; et al.
IEEE Access. 8:37287-37304

Parallel computing Computer Networks and Co... Multiprocessing 02 engineering and techn... Biochemistry 7. Clean energy …
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24

A Parameterized Formal Model for the Analysis of Preemption-Threshold Scheduling in Real-Time Systems
Imene Ben Hafaiedh ; Maroua Ben Slimane
IEEE Access, Vol 8, Pp 58180-58193 (2020)

Model checking Artificial intelligence Dynamic priority schedul... 0102 computer and inform... 02 engineering and techn... Fixed-priority pre-empti... …
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25

Performance Evaluation of Application Mapping Approaches for Network-on-Chip Designs
Waqar Amin ; Fawad Hussain ; Sheraz Anjum ; et al.
IEEE Access, Vol 8, Pp 63607-63631 (2020)

Realization (probability... Artificial intelligence Computer Networks and Co... Networks on Chip 02 engineering and techn... Latency (audio) …
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26

A Unified Model-Based Framework for the Simplified Execution of Static and Dynamic Assertion-Based Verification
Muhammad Waseem Anwar ; Muhammad Rashid ; Farooque Azam ; et al.
IEEE Access, Vol 8, Pp 104407-104431 (2020)

Runtime Verification 02 engineering and techn... Model Checking Model Consistency Safety Verification Functional verification …
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27

Latency Evaluation of SDFGs on Heterogeneous Processors Using Timed Automata
Sivashankari Rajadurai ; Mamoun Alazab ; Neeraj Kumar ; et al.
IEEE Access, Vol 8, Pp 140171-140180 (2020)

Automaton Parallel computing 02 engineering and techn... Latency (audio) Multiprocessor Schedulin... Theoretical computer sci... …
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28

Irregularity of Block Shift Networks and Hierarchical Hypercube Networks
Abid Mehboob ; Juanyan Fang ; Iftikhar Ahmed ; et al.
Journal of Chemistry, Vol 2019 (2019)

Parallel computing Computer Networks and Co... Networks on Chip Economics 02 engineering and techn... 01 natural sciences …
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29

From FPGA to Support Cloud to Cloud of FPGA: State of the Art
Benoit Suffran ; Virginie Fresse ; Jean-Paul Jamont ; et al.
International Journal of Reconfigurable Computing, Vol 2019 (2019)

Exploit Computer engineering. Co... Memristive Devices for N... Flexibility (engineering... 02 engineering and techn... TK7885-7895 …
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30

Design of a Distributed HIDS for IoT Backbone Components
Guilherme de O. Kfouri ; Daniel Ronaldo Gonçalves ; Bruno Dutra ; et al.
Annals of computer science and information systems, Vol 20, Pp 81-88 (2019)

Computer network Embedded Systems and Dat... Physics Internet of Things Component (thermodynamic... Information technology …
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31

Management of Scratchpad Memory Using Programming Techniques
Kavita Tabbassum ; Shah Nawaz Talpur ; Sanam Narejo ; et al.
Mehran University Research Journal of Engineering and Technology, Vol 38, Iss 2, Pp 305-312 (2019)

Parallel computing Technology Science 02 engineering and techn... Cache coloring Engineering …
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32

FPGA Implementation of an Improved Reconfigurable FSMIM Architecture Using Logarithmic Barrier Function Based Gradient Descent Approach
Nitish Das ; Aruna Priya P
International Journal of Reconfigurable Computing, Vol 2019 (2019)

Parallel computing Artificial neural networ... Computer engineering. Co... Artificial intelligence Computer Networks and Co... Dynamic Reconfiguration …
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33

UVM Based Reusable Verification IP for Wishbone Compliant SPI Master Core
Lakhan Shiva Kamireddy ; Lakhan Saiteja Kamireddy
International Journal of VLSI Design & Communication Systems. 9:21-29

FOS: Computer and inform... Interface (matter) Model checking 0209 industrial biotechn... Other Computer Science (... Functional Verification,... …
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34

FPGA Implementation of Reconfigurable Finite State Machine with Input Multiplexing Architecture Using Hungarian Method
Nitish Das ; P. Aruna Priya
International Journal of Reconfigurable Computing, Vol 2018 (2018)

Parallel computing Computer engineering. Co... Artificial intelligence Computer Networks and Co... Dynamic Reconfiguration 0211 other engineering a... …
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35

Analytical and Experimental Performance Evaluations of CAN-FD Bus
Ricardo Andrade ; Kleber Nogueira Hodel ; João F. Justo ; et al.
IEEE Access, Vol 6, Pp 21287-21295 (2018)

Byte Alternative medicine Bus network Real-Time Simulation Tec... 02 engineering and techn... CAN-FD bus …
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36

Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction
Lilia Kechiche ; Lamjed Touil ; Bouraoui Ouni
International Journal of Reconfigurable Computing, Vol 2018 (2018)

Computer engineering. Co... Advancements in Video Co... System-Level Design Geometry 02 engineering and techn... Quantum mechanics …
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37

High-Performance and Energy-Efficient Fault Tolerance FPGA-to-FPGA Communication
B. Naresh Kumar Reddy ; Swamy Cherukuru ; V. Kalai Vani ; et al.

Computer Networks and Co... Fault Tolerance 02 engineering and techn... 7. Clean energy Engineering FPGA prototype …
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38

PARTITIONING AND SCHEDULING RESOLUTION PROBLEMS BY BEES MATING STRATEGY IN DRES’ SYSTEMS
Khadidja Yahyaoui
International Journal of Computing. :97-105

Performance Optimization Real-Time Scheduling in... Mathematical optimizatio... Metaheuristic Bees algorithm 02 engineering and techn... …
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39

TLM-2 base protocol analysis for model-driven design
Rached Tourki ; Salaheddine Hamza Sfar ; Imed Bennour
2017 International Conference on Engineering & MIS (ICEMIS). :1-8

Computer Networks and Co... System-Level Design FOS: Mechanical engineer... 02 engineering and techn... 7. Clean energy Context (archaeology) …
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40

Case Study: First-Time Success ASIC Design Methodology Applied to a Multi-Processor System-on-Chip
Arya Wicaksana ; Dareen Kusuma Halim ; Dicky Hartono ; et al.
Application Specific Integrated Circuits-Technologies, Digital Systems and Design Methodologies ISBN: 9781789858471
Application Specific Integrated Circuits-Technologies, Digital Systems and Design Methodologies

Electronic design automa... System on a chip Computer Networks and Co... System-Level Design MPSoC Reconfigurable Computing... …
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