American Psychological Association 6th edition

Wang, J., Shi, Y., Chen, Z., & Wen, M. (2025). Spike Flow: A hardware–software co-designed systolic array for spiking neural networks. Journal of Systems Architecture, 169, N.PAG-0. https://doi.org/10.1016/j.sysarc.2025.103604

ISO-690 (author-date, English)

WANG, Jianan, SHI, Yang, CHEN, Zhaoyun und WEN, Mei, 2025. Spike Flow: A hardware–software co-designed systolic array for spiking neural networks. Journal of Systems Architecture. 1 Dezember 2025. Vol. 169, , p. N.PAG-0. DOI 10.1016/j.sysarc.2025.103604.

Modern Language Association 9th edition

Wang, J., Y. Shi, Z. Chen, und M. Wen. „Spike Flow: A hardware–software Co-Designed Systolic Array for Spiking Neural Networks.“. Journal of Systems Architecture, Bd. 169, Dezember 2025, S. N.PAG-0, https://doi.org/10.1016/j.sysarc.2025.103604.

Mohr Siebeck - Recht (Deutsch - Österreich)

Wang, Jianan/Shi, Yang/Chen, Zhaoyun/Wen, Mei: Spike Flow: A hardware–software co-designed systolic array for spiking neural networks., Journal of Systems Architecture 2025, N.PAG-0.

Emerald - Harvard

Wang, J., Shi, Y., Chen, Z. und Wen, M. (2025), „Spike Flow: A hardware–software co-designed systolic array for spiking neural networks.“, Journal of Systems Architecture, Vol. 169, S. N.PAG-0.

Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.