Treffer: Compiler Optimization on Instruction Scheduling for a Specialized Real-Time Floating Point Soft-Core Processor

Title:
Compiler Optimization on Instruction Scheduling for a Specialized Real-Time Floating Point Soft-Core Processor
Authors:
Michael Kirchhoff, L. Wagner, Wolfgang Fengler
Source:
Advances in Electrical and Computer Engineering, Vol 19, Iss 3, Pp 57-68 (2019)
Publisher Information:
Universitatea Stefan cel Mare din Suceava, 2019.
Publication Year:
2019
Subject Terms:
TK7885-7895, Computer engineering. Computer hardware, processor scheduling, 0202 electrical engineering, electronic engineering, information engineering, dynamic compiler, optimization methods, Electrical engineering. Electronics. Nuclear engineering, 02 engineering and technology, vector processor, scheduling algorithms, TK1-9971
Document Type:
Fachzeitschrift Article
Language:
English
ISSN:
1844-7600
1582-7445
DOI:
10.4316/aece.2019.03007
Access URL:
https://doaj.org/article/f5afda243813437f8be97b2d9c1104be
https://aece.ro/abstractplus.php?year=2019&number=3&article=7
Rights:
CC BY NC ND
Accession Number:
edsair.doi.dedup.....4e7642837a199fa866c00a89f34e5190
Database:
OpenAIRE

Weitere Informationen

This paper presents the authors' research in the field of specialized optimizing assembly language compilers for embedded real-time soft-core processor systems on FPGAs. With this soft-core processor, we are targeting a highly specialized field of applications that require large floating-point precision and other unique characteristics. Therefore, a specialized optimizing assembly language compiler is necessary in order to provide the needed machine code and optimize it in a way that efficient usage of the internal parallelism mechanisms is possible, resulting in major performance benefits on single-core, multi-core and vector processors. One important key feature is the design-time analyzability to meet the hard real-time constraints of any given problem.