Result: Parallel Algorithms For CAD With Applications To Circuit Extraction

Title:
Parallel Algorithms For CAD With Applications To Circuit Extraction
Contributors:
The Pennsylvania State University CiteSeerX Archives
Publication Year:
1991
Collection:
CiteSeerX
Document Type:
Academic journal text
File Description:
application/postscript
Language:
English
Rights:
Metadata may be used without restrictions as long as the oai identifier remains attached to it.
Accession Number:
edsbas.8501ED4C
Database:
BASE

Further Information

INTRODUCTION 1.1. Parallel Processing for CAD As the sizes of VLSI circuits increases in the future, the computational requirements for performing various computer-aided design (CAD) tasks such as simulation, design-rule checking, circuit extraction, cell placement and wire routing will increase tremendously. There will be an increasing need for more accuracy and capabilities from these CAD tools which would involve substantially more computations. Parallel processing provides an effective way for increasing the capabilities of the CAD tools. It not only reduces the time taken by various CAD tasks, but also increases the sizes of circuits that can be effectively handled by the CAD tools. There are two approaches to the use of parallel processing. The first approach involves the use of special-purpose hardware accelerators. Special-purpose hardware accelerators have been proposed to speed up a wide variety of CAD tasks including logic simulation, wire-routing, design rul