• VHDL behavioural modelling of...

Treffer: VHDL behavioural modelling of pipeline analog to digital converters

Title:
VHDL behavioural modelling of pipeline analog to digital converters
Authors:
ACOSTA, Antonio J, PERALIAS, Eduardo J, RUEDA, Adoracion, HUERTAS, José L
Source:
ADC modelling and testingMeasurement. 31(1):47-60
Publisher Information:
Oxford: Elsevier, 2002.
Publication Year:
2002
Physical Description:
print, 11 ref
Original Material:
INIST-CNRS
Subject Terms:
Physics, Physique, Sciences exactes et technologie, Exact sciences and technology, Physique, Physics, Generalites, General, Instruments, appareillage, composants et techniques communs à plusieurs branches de la physique et de l'astronomie, Instruments, apparatus, components and techniques common to several branches of physics and astronomy, Informatique en physique expérimentale, Computers in experimental physics, Modélisation et simulation par ordinateur, Computer modeling and simulation, Méthodes et appareillages électroniques et électriques, Electrical and electronic components, instruments and techniques, Circuits et composants de circuit, Circuits ans circuit components, Sciences appliquees, Applied sciences, Telecommunications et theorie de l'information, Telecommunications and information theory, Théorie de l'information, du signal et des communications, Information, signal and communications theory, Théorie du signal et des communications, Signal and communications theory, Conversion an, conversion na, codage mic, Analog-digital conversion, digital-analog conversion, pcm coding, Circuits and circuit components, Convertisseur analogique numérique, Analog to digital converters, Etalonnage, Calibration, Fabrication microélectronique, Microelectronic fabrication, Fabricación microeléctrica, Langage description matériel informatique, Hardware description languages, Modélisation, Modelling, Pipeline, Pipelines, Processeur pipeline, Pipeline processor, Procesador oleoducto, Simulation, Très grande vitesse, Very high speed, Velocidad muy grande
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla, Edificio CICA, Avda. Reina Mercedes s/n, 41012 Sevilla, Spain
ISSN:
0263-2241
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=13420911
Rights:
Copyright 2002 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Metrology

Telecommunications and information theory
Accession Number:
edscal.13420911
Database:
PASCAL Archive

Weitere Informationen

This paper describes a VHDL implementation of a behavioural model for pipeline analog to digital converters (ADCs). The goal is using this VHDL description to facilitate the synthesis of the digital part, which in our example includes digital correction, digital calibration, and control of the ADC testing modes. Among other aspects of general interest, we will show how analog dynamic effects are incorporated in order to obtain accurate high level simulations. As an application example, an ADC of 10-bits and 10 MSamples/s has been modelled and simulated. Results from these high level simulations carried out using QuickHDL in Mentor Graphics are compared with those obtained experimentally from a silicon prototype, validating the suitability of the model.