Treffer: Scalable FFT processors and pipelined butterfly units
Title:
Scalable FFT processors and pipelined butterfly units
Authors:
Source:
Computer systems : architectures, modeling, and simulation (Samos, 21-23 July 2003 & 19-21 July 2004)Lecture notes in computer science. :373-382
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 14 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Logiciel, Software, Traitement des langages et microprogrammation, Language processing and microprogramming, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Architecture ordinateur, Computer architecture, Arquitectura ordenador, Arithmétique ordinateur, Computer arithmetic, Aritmética ordenador, Processeur pipeline, Pipeline processor, Procesador oleoducto, Transformation Fourier rapide, Fast Fourier transformation, Transformación Fourier rápida, Synthèse logique, Logic synthesis, Síntesis lógica
Document Type:
Konferenz
Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Tampere University of Technology, P.O.Box 553, 33101 Tampere, Finland
ISSN:
0302-9743
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems
Electronics
Electronics
Accession Number:
edscal.16075766
Database:
PASCAL Archive
Weitere Informationen
This paper considers partial-column radix-2 FFT processors. The efficiency of processors based on bit-parallel multipliers, distributed arithmetic, and CORDIC is analyzed with the aid of logic synthesis.