Treffer: Initial evaluation of multimedia extensions on VLIW architectures

Title:
Initial evaluation of multimedia extensions on VLIW architectures
Source:
Computer systems : architectures, modeling, and simulation (Samos, 21-23 July 2003 & 19-21 July 2004)Lecture notes in computer science. :403-412
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 12 ref
Original Material:
INIST-CNRS
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Computer Architecture Department, UPC, Barcelona, Spain
ISSN:
0302-9743
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems

Electronics
Accession Number:
edscal.16075769
Database:
PASCAL Archive

Weitere Informationen

Media processing has motivated strong changes in the focus and design of processors. The inclusion of pSIMD multimedia extensions such as MMX is a cost effective option to improve the performance of those regions of the program with large amounts of DLP. This paper provides an initial evaluation of μSIMD and vector-SIMD enhanced VLIW architectures. We show that these two architectures execute respectively an average of 40% and 57% fewer operations than the reference VLIW architecture. However, when most of the available DLP parallelism has been exploited via multimedia extensions or wide-issue static scheduling, the remaining of the program exhibits only modest amounts of ILP (1.40 operations per cycle for a 8-issue width architecture). We claim that, in general, vector-SIMD extensions achieve the highest speed-ups while still reducing the fetch pressure, although for wide-issue pSIMD architectures reach a similar performance at a lower cost.