Treffer: Evolvable hardware for signal separation and noise cancellation using analog reconfigurable device

Title:
Evolvable hardware for signal separation and noise cancellation using analog reconfigurable device
Authors:
KEYMEULEN, D, ZEBULUM, R, STOICA, A, DUONG, V, FERGUSON, M. I
Source:
FPL 2004 : field-programmable logic and applications (Antwerp, 30 August - 1 September 2004)Lecture notes in computer science. :270-278
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 6 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Mathematics, Mathématiques, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Logiciel, Software, Traitement des langages et microprogrammation, Language processing and microprogramming, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Algorithme génétique, Genetic algorithm, Algoritmo genético, Algorithme évolutionniste, Evolutionary algorithm, Algoritmo evoluciónista, Appareil analogique, Analog device, Aparato analógico, Architecture reconfigurable, Reconfigurable architectures, Conception circuit, Circuit design, Diseño circuito, Méthode adaptative, Adaptive method, Método adaptativo, Méthode séparation, Separation method, Método separación, Rapport signal bruit, Signal to noise ratio, Relación señal ruido, Réduction bruit, Noise reduction, Reducción ruido, Réseau porte programmable, Field programmable gate array, Red puerta programable, Séparation source, Source separation, Separación señal, Traitement signal, Signal processing, Procesamiento señal
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Jet Propulsion Laboratory, 4800 Oak Grove Laboratory, United States
ISSN:
0302-9743
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=16107473
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems

Electronics
Accession Number:
edscal.16107473
Database:
PASCAL Archive

Weitere Informationen

Evolvable systems in silicon are third generation hardware in terms of flexibility. The first generation was fixed silicon: once a device was fabricated its structure was forever fixed. Reconfigurable hardware came as a second generation: new configurations could be downloaded changing the function of the device and also bypassing faulty areas, if any. The third generation is that of self-configurable, evolvable hardware (EHW), and adds the automatic reconfiguration feature, enabling truly adaptive hardware. This paper addresses current efforts in building and using evolvable chips. The first section refers to evolutionary algorithms for evolvable hardware. The second section describes the JPL evolvable hardware testbed and the JPL Field Programmable Transistor Array (FPTA) chip designed and used for circuit evolution in silicon. The third section addresses the application of evolvable hardware for signal separation and noise cancellation. The final section concludes the work.