Result: The chess monster hydra

Title:
The chess monster hydra
Source:
FPL 2004 : field-programmable logic and applications (Antwerp, 30 August - 1 September 2004)Lecture notes in computer science. :927-932
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 7 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Mathematics, Mathématiques, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Logiciel, Software, Traitement des langages et microprogrammation, Language processing and microprogramming, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Algorithme recherche, Search algorithm, Algoritmo búsqueda, Algorithme réparti, Distributed algorithm, Algoritmo repartido, Arbre recherche, Search tree, Arbol investigación, Architecture reconfigurable, Reconfigurable architectures, Conception circuit, Circuit design, Diseño circuito, Développement logiciel, Software development, Desarrollo logicial, Envoi message, Message passing, Jeu échecs, Chess game, Ajedrez, Longue durée, Long lasting, Larga duración, Parallélisme, Parallelism, Paralelismo, Philosophie, Philosophy, Filosofía, Processus communicant, Communicating process, Proceso comunicante, Réseau porte programmable, Field programmable gate array, Red puerta programable, Structure grain fin, Fine grain structure, Estructura grano fino, Structure gros grain, Coarse grain structure, Estructura grano grueso, Système réparti, Distributed system, Sistema repartido
Document Type:
Conference Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Universität Paderborn, Faculty of Computer Science, Electrical Engineering and Mathematics, Fürstenallee 11, 33102 Paderborn, Germany
ISSN:
0302-9743
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems

Electronics
Accession Number:
edscal.16107478
Database:
PASCAL Archive

Further Information

With the help of the FPGA technology, the boarder between hard- and software has vanished. It is now possible to develop complex designs and fine grained parallel applications without the long-lasting chip design cycles. Additionally, it has become easier to write coarse grained parallel applications with the help of message passing libraries like MPI. The chess program Hydra is a high level hardware-software co-design application which profits from both worlds. We describe the design philosophy, general architecture and performance of Hydra. The time critical part of the search tree, near the leaves, is explored with the help of fine grain parallelism of FPGA cards. For nodes near the root, the search algorithm runs distributed on a cluster of conventional processors. A nice detail is that the FPGA cards allow the implementation of sophisticated chess knowledge without decreasing the computational speed.