Treffer: Optimal routing-conscious dynamic placement for reconfigurable devices

Title:
Optimal routing-conscious dynamic placement for reconfigurable devices
Authors:
AHMADINIA, Ali, BOBDA, Christophe, FEKETE, Sandor P, TEICH, Jiirgen, VAN DER VEEN, Jan C
Source:
FPL 2004 : field-programmable logic and applications (Antwerp, 30 August - 1 September 2004)Lecture notes in computer science. :847-851
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 7 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Mathematics, Mathématiques, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Logiciel, Software, Traitement des langages et microprogrammation, Language processing and microprogramming, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Algorithmique, Algorithmics, Algorítmica, Architecture reconfigurable, Reconfigurable architectures, Champ libre, Free field, Campo libre, Conception circuit, Circuit design, Diseño circuito, Géométrie algorithmique, Computational geometry, Geometría computacional, Méthode heuristique, Heuristic method, Método heurístico, Routage, Routing, Enrutamiento, Réseau porte programmable, Field programmable gate array, Red puerta programable, Temps minimal, Minimum time, Tiempo mínimo
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Department of Computer Science 12, University of Erlangen-Nuremberg, Germany
Department of Mathematical Optimization, Braunschweig University of Technology, Germany
ISSN:
0302-9743
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=16107548
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems

Electronics
Accession Number:
edscal.16107548
Database:
PASCAL Archive

Weitere Informationen

We describe algorithmic results for two crucial aspects of allocating resources on computational hardware devices with partial reconfigurability. By using methods from the field of computational geometry, we derive a method that allows correct maintainance of free and occupied space of a set of n rectangular modules in optimal time Θ(n log n); previous approaches needed a time of O(n2) for correct results and O(n) for heuristic results. We also show that finding an optimal feasible communication-conscious placement (which minimizes the total weighted Manhattan distance between the new module and existing demand points) can be computed in Θ(n log n). Both resulting algorithms are practically easy to implement and show convincing experimental behavior.