Result: Java technology in an FPGA

Title:
Java technology in an FPGA
Authors:
SCHOEBERL, Martin
Source:
FPL 2004 : field-programmable logic and applications (Antwerp, 30 August - 1 September 2004)Lecture notes in computer science. :917-921
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 6 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Mathematics, Mathématiques, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Logiciel, Software, Traitement des langages et microprogrammation, Language processing and microprogramming, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Architecture reconfigurable, Reconfigurable architectures, Calculateur embarqué, Boarded computer, Calculador embarque, Code temps, Time code, Código tiempo, Compilateur, Compiler, Compilador, Conception circuit, Circuit design, Diseño circuito, Densité, Density, Densidad, Interpréteur, Interpreter, Intérprete, Juste à temps, Just in time, Justo en tiempo, Langage JAVA, JAVA language, Lenguaje JAVA, Machine virtuelle, Virtual machine, Máquina virtual, Orienté objet, Object oriented, Orientado objeto, Ouverture, Opening, Abertura, Pragmatique, Pragmatics, Pragmatica linguístca, Programmation logique, Logical programming, Programación lógica, Réseau porte programmable, Field programmable gate array, Red puerta programable, Temps exécution, Execution time, Tiempo ejecución
Document Type:
Conference Conference Paper
File Description:
text
Language:
English
Author Affiliations:
JOP.design, Vienna, Austria
ISSN:
0302-9743
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=16107554
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems

Electronics
Accession Number:
edscal.16107554
Database:
PASCAL Archive

Further Information

The application of Field Programmable Gate Arrays (FPGA) has moved from simple glue logic to complete systems. The potential for FPGA use in embedded systems is steadily increasing continuously opening up new application areas. Low cost FPGA devices are available in logic densities where the CPU with necessary peripheral device can be integrated in a single device. Java, with its pragmatic approach to object orientation and enhancements over C, got very popular for desktop and server application development. Some features of Java, such as thread support in the language, could greatly simplify development of embedded systems. However, due to resource constraints in embedded systems, the common implementations of the Java Virtual Machine (JVM), as interpreter or just-in-time compiler, are not practical. This paper describes an alternative approach: JOP (a Java Optimized Processor) is a hardware implementation of the JVM with short and predictable execution time of most byte-codes. JOP is implemented as a configurable soft core in an FPGA. With JOP it is possible to develop applications in pure Java on resource constraint devices.