Result: Throughput and reconfiguration time trade-offs: From static to dynamic reconfiguration in dedicated image filters
Title:
Throughput and reconfiguration time trade-offs: From static to dynamic reconfiguration in dedicated image filters
Authors:
Source:
FPL 2004 : field-programmable logic and applications (Antwerp, 30 August - 1 September 2004)Lecture notes in computer science. :474-483
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 17 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Mathematics, Mathématiques, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Logiciel, Software, Traitement des langages et microprogrammation, Language processing and microprogramming, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Architecture reconfigurable, Reconfigurable architectures, Conception circuit, Circuit design, Diseño circuito, Critère performance, Performance requirement, Criterio resultado, Filtre, Filter, Filtro, Image numérique, Digital image, Imagen numérica, Performance algorithme, Algorithm performance, Resultado algoritmo, Réseau porte programmable, Field programmable gate array, Red puerta programable, Temps réel, Real time, Tiempo real, Temps traitement, Processing time, Tiempo proceso, Traitement image, Image processing, Procesamiento imagen, Traitement numérique, Digital processing, Tratamiento digital
Document Type:
Conference
Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Informatics Institute, Federal University of Rio Grande do Sul, C.P. 15064, 91501-970, Porto Alegre, Brazil
Informatics and Applied Mathematics Department, Federal University of Rio Grande do Norte, Natal, Brazil
Informatics and Applied Mathematics Department, Federal University of Rio Grande do Norte, Natal, Brazil
ISSN:
0302-9743
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems
Electronics
Electronics
Accession Number:
edscal.16107621
Database:
PASCAL Archive
Further Information
This paper analyzes the evolution of DRIP image processor from a statically reconfigurable design to a fast dynamic approach. The focus is in the overhead introduced by new programmable modules needed for RTR support and in the methodology used to redefine the basic processor elements. DRIP can perform a huge set of digital image processing algorithms with real-time performance, attending the requirements of contemporary complex applications.