Treffer: Automatic synthesis of efficient intrusion detection systems on FPGAs
Title:
Automatic synthesis of efficient intrusion detection systems on FPGAs
Authors:
Source:
FPL 2004 : field-programmable logic and applications (Antwerp, 30 August - 1 September 2004)Lecture notes in computer science. :311-321
Publisher Information:
Berlin: Springer, 2004.
Publication Year:
2004
Physical Description:
print, 15 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Mathematics, Mathématiques, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Logiciel, Software, Traitement des langages et microprogrammation, Language processing and microprogramming, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Architecture reconfigurable, Reconfigurable architectures, Architecture système, System architecture, Arquitectura sistema, Conception circuit, Circuit design, Diseño circuito, Décomposition domaine, Domain decomposition, Descomposición dominio, Décomposition graphe, Graph decomposition, Descomposición grafo, Détecteur intrus, Intruder detector, Detector intruso, Evaluation performance, Performance evaluation, Evaluación prestación, Haute performance, High performance, Alto rendimiento, Optimisation, Optimization, Optimización, Réseau porte programmable, Field programmable gate array, Red puerta programable, Réutilisation, Reuse, Reutilización, Système détection intrusion, Intrusion detection systems, Sécurité informatique, Computer security, Seguridad informatica, Théorie graphe, Graph theory, Teoría grafo, Application intensive, Intensive application, Aplicación intensiva
Document Type:
Konferenz
Conference Paper
File Description:
text
Language:
English
Author Affiliations:
University of Southern California, Los Angeles, CA, United States
ISSN:
0302-9743
Rights:
Copyright 2004 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems
Electronics
Electronics
Accession Number:
edscal.16107624
Database:
PASCAL Archive
Weitere Informationen
This paper presents a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology, and tree-based lookahead architectures. Intrusion detection for network security is a compute-intensive application demanding high system performance. This tool automates the creation of efficient FPGA architectures using system-level optimizations, a relatively unexplored field in this area. The pre-design tool allows for more efficient communication and extensive reuse of hardware components for dramatic increases in area-time performance. The tool is available online for public use.