Result: T-Rex, a blade packaging architecture for mainframe servers
Title:
T-Rex, a blade packaging architecture for mainframe servers
Authors:
Source:
IEEE transactions on advanced packaging. 28(1):24-31
Publisher Information:
Piscataway, NY: Institute of Electrical and Electronics Engineers, 2005.
Publication Year:
2005
Physical Description:
print, 5 ref
Original Material:
INIST-CNRS
Subject Terms:
Electronics, Electronique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Electronique, Electronics, Appareillage électronique et fabrication. Composants passifs, circuits imprimés, connectique, Electronic equipment and fabrication. Passive components, printed wiring boards, connectics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Conception. Technologies. Analyse fonctionnement. Essais, Design. Technologies. Operation analysis. Testing, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Matériel informatique, Hardware, Ordinateurs, microordinateurs, Computers, microcomputers, Alimentation à commutation, Switching power supply, Alimentación con conmutación, Architecture ordinateur, Computer architecture, Arquitectura ordenador, Canal bus, Bus(channel), Canal colector, Circuit intégré, Integrated circuit, Circuito integrado, Codage, Coding, Codificación, Conception ordinateur, Computer design, Concepción ordenador, Conception système, System design, Concepción sistema, Dispositif semiconducteur, Semiconductor device, Dispositivo semiconductor, Evaluation performance, Performance evaluation, Evaluación prestación, Fabrication microélectronique, Microelectronic fabrication, Fabricación microeléctrica, Haute fréquence, High frequency, Alta frecuencia, Interconnexion, Interconnection, Interconexión, Modulation porteuse multiple, Multicarrier modulation, Modulación multiportadura, Module multipuce, Multichip module, Modulo multipulga, Multitraitement, Multiprocessing, Multitratamiento, Packaging électronique, Electronic packaging, Packaging electrónico, Processeur, Processor, Procesador, Signal numérique, Digital signal, Señal numérica, Système informatique, Computer system, Sistema informático, Temps exécution, Execution time, Tiempo ejecución, Ordinateur central, Mainframe, Ordenador principal, Blade servers, computer architecture, computer system design, design methodology, electronic packaging, high-frequency digital signals, mainframe computers, multichip modules (MCMs), semiconductor device packaging
Document Type:
Conference
Conference Paper
File Description:
text
Language:
English
Author Affiliations:
IBM Corporation, Poughkeepsie, NY 12601, United States
Boeblingen Packaging Department, IBM Corporation, Boeblingen 71032, Germany
Boeblingen Packaging Department, IBM Corporation, Boeblingen 71032, Germany
ISSN:
1521-3323
Rights:
Copyright 2005 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Electronics
Accession Number:
edscal.16480022
Database:
PASCAL Archive
Further Information
In this paper, we describe the application of the blade packaging concept to the IBM zSeries eServer z990, code-named T-Rex. The advantages of such packaging architecture are highlighted and the challenges for the system performance are identified. The physical and electrical attributes of the five types of buses required to support a processing operating frequency of 1.25 GHz in a symmetric multiprocessing (SMP) architecture with up to 64 processor cores are tabulated. The evolution of the I/O circuits for each of these buses is described along with the bus cycle time and bandwidth trends.