Treffer: An algebraic framework for verifying the correctness of hardware with input and output : A formalization in HOL

Title:
An algebraic framework for verifying the correctness of hardware with input and output : A formalization in HOL
Authors:
Source:
Algebra and coalgebra in computer science (Swansea, 3-6 September 2005)Lecture notes in computer science. :157-174
Publisher Information:
Berlin: Springer, 2005.
Publication Year:
2005
Physical Description:
print, 18 ref
Original Material:
INIST-CNRS
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Computer Laboratory, University of Cambridge, United Kingdom
ISSN:
0302-9743
Rights:
Copyright 2005 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems
Accession Number:
edscal.17116001
Database:
PASCAL Archive

Weitere Informationen

The HOL-4 proof system has been used to implement an algebraic framework for verifying the correctness of hardware with input and output. Implementations and specifications are modelled as iterated maps, with input and output modelled using streams. The correctness model supports three types of abstraction: temporal abstraction (with immersions), data abstraction, and stream abstraction. This work has been used to formally verify the ARM6 microprocessor. This paper discusses this processor's input and output behaviour and shows how this has been modelled and verified in HOL. The verification is believed to be the first complete formal verification of a commercial off-the-shelf (COTS) processor. The definition of correctness given here is new - it is suited to verifying ARM's block data transfer instructions, these load and store sets of registers.