Treffer: DC-free error-control block codes

Title:
DC-free error-control block codes
Authors:
FENGQIN ZHAI, YAN XIN, FAIR, Ivan J
Source:
IEEE transactions on communications. 53(10):1639-1647
Publisher Information:
New York, NY: Institute of Electrical and Electronics Engineers, 2005.
Publication Year:
2005
Physical Description:
print, 28 ref
Original Material:
INIST-CNRS
Subject Terms:
Telecommunications, Télécommunications, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Telecommunications et theorie de l'information, Telecommunications and information theory, Théorie de l'information, du signal et des communications, Information, signal and communications theory, Théorie du signal et des communications, Signal and communications theory, Codage, codes, Coding, codes, Télécommunications, Telecommunications, Systèmes, réseaux et services de télécommunications, Systems, networks and services of telecommunications, Transmission et modulation (techniques et équipements), Transmission and modulation (techniques and equipments), Basse fréquence, Low frequency, Baja frecuencia, Brouillage intentionnel, Jamming, Interferencia intencional, Canal bruit blanc gaussien additif, AWGN channels, Codage binaire, Binary coding, Codificación binaria, Code BCH, BCH code, Código BCH, Code Reed Solomon, Reed Solomon code, Código Reed Solomon, Code binaire, Binary code, Código binario, Code bloc, Block code, Código bloque, Code commande, Control code, Código control, Code contrôle parité, Parity check codes, Code correcteur erreur, Error correcting code, Código corrector error, Commande puissance, Power control, Control potencia, Décodage itératif, Iterative decoding, Evaluation performance, Performance evaluation, Evaluación prestación, Implémentation, Implementation, Implementación, Stockage numérique, Digital storage, Structure périodique, Periodic structure, Estructura periódica, Système cyclique, Cyclic system, Sistema cíclico, Système mémoire, Storage system, Sistema memoria, Taux erreur bit, Bit error rate, Tasa error bit, Transmission numérique, Digital transmission, Transmisión numérica, Complementary codeword pair, dc-free codes, error-control (EC) block codes, guided scrambling (GS), multimode coding
Document Type:
Fachzeitschrift Article
File Description:
text
Language:
English
Author Affiliations:
Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB T6G 2V4, Canada
ISSN:
0090-6778
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=17203859
Rights:
Copyright 2005 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Telecommunications and information theory
Accession Number:
edscal.17203859
Database:
PASCAL Archive

Weitere Informationen

DC-free codes and error-control (EC) codes are widely used in digital transmission and storage systems. To improve system performance in terms of code rate, bit-error rate (BER), and low-frequency suppression, and to provide a flexible tradeoff between these parameters, this paper introduces a new class of codes with both dc-control and EC capability. The new codes integrate dc-free encoding and EC encoding, and are decoded by first applying standard EC decoding techniques prior to dc-free decoding, thereby avoiding the drawbacks that arise when dc-free decoding precedes EC decoding. The de-free code property is introduced into standard EC codes through multimode coding techniques, at the cost of minor loss in BER performance on the additive white Gaussian noise channel, and some increase in implementation complexity, particularly at the encoder. This paper demonstrates that a wide variety of EC block codes can be integrated into this dc-free coding structure, including binary cyclic codes, binary primitive BCH codes, Reed-Solomon codes, Reed-Muller codes, and some capacity-approaching EC block codes, such as low-density parity-check codes and product codes with iterative decoding. Performance of the new de-free EC block codes is presented.