Treffer: Des flottants 16 bits sur microprocesseurs d'usage général pour images et multimédia / 16 bit floating point instructions on common microprocessors for image and multimedia processing

Title:
Des flottants 16 bits sur microprocesseurs d'usage général pour images et multimédia / 16 bit floating point instructions on common microprocessors for image and multimedia processing
Source:
Architecture des ordinateursTSI. Technique et science informatiques. 24(6):645-665
Publisher Information:
Paris: Lavoisier, 2005.
Publication Year:
2005
Physical Description:
print, 1 p.1/4
Original Material:
INIST-CNRS
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
French
Author Affiliations:
LRI, Université Paris Sud, 91405 Orsay, France
IEF, Université Paris Sud, 91405 Orsay, France
ISSN:
0752-4072
Rights:
Copyright 2006 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems
Accession Number:
edscal.17375398
Database:
PASCAL Archive

Weitere Informationen

We consider the implementation of 16-bit floating point instructions on a Pentium 4 and a PowerPC G5 for image and media processing. By measuring the execution time of bench-marks with these new simulated instructions, we show that significant speed-ups are obtained compared to 32-bit FP versions. For image processing, the speed-up both comes from doubling the number ofoperations per SIMD instruction and the better cache behavior with byte storage. For data stream processing with arrays of structures, the speed-up comes from the wider SIMD instructions.