Treffer: A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process

Title:
A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process
Source:
IEEE journal of solid-state circuits. 41(5):1149-1159
Publisher Information:
New York, NY: Institute of Electrical and Electronics Engineers, 2006.
Publication Year:
2006
Physical Description:
print, 21 ref
Original Material:
INIST-CNRS
Subject Terms:
Electronics, Electronique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Conception. Technologies. Analyse fonctionnement. Essais, Design. Technologies. Operation analysis. Testing, Circuits électriques, optiques et optoélectroniques, Electric, optical and optoelectronic circuits, Propriétés des circuits, Circuit properties, Circuits électroniques, Electronic circuits, Amplificateurs, Amplifiers, Convertisseurs de signal, Signal convertors, Matériel informatique, Hardware, Equipements d'entrée-sortie, Input-output equipment, Alimentation électrique, Power supply, Alimentación eléctrica, Amplificateur faible bruit, Low noise amplifier, Amplificador bajo ruido, Bande base, Base band, Banda base, Bobine inductance, Inductor, Charge résistive, Resistive load, Carga resistiva, Circuit intégré CMOS, CMOS integrated circuits, Circuit intégré, Integrated circuit, Circuito integrado, Commande automatique gain, Automatic gain control, Control automático ganancia, Convertisseur AN, AD converter, Convertidor AN, Convertisseur direct, Direct convertor, Convertidor directo, Convertisseur fréquence, Frequency converter, Convertidor frecuencia, Diviseur fréquence, Frequency divider, Divisor frecuencia, Figure bruit, Noise figure, Figura ruido, Filtrage analogique, Analog filtering, Filtrado analógico, Gain, Ganancia, Interface utilisateur, User interface, Interfase usuario, Module multipuce, Multichip module, Modulo multipulga, Mélangeur, Mixer, Mezclador, Numérisation, Digitizing, Numerización, Radiofréquence, Radiofrequency, Radiofrecuencia, Récepteur radioélectrique, Radio receivers, Technologie MOS complémentaire, Complementary MOS technology, Tecnología MOS complementario, Autopolarisation, Self bias, low-noise amplifier, multimode, radio frequency integrated circuits, transceivers, wireless
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Department of Electrical Engineering, Ira A. Fulton School Of Engineering, Arizona State University, Tempe, AZ 85287, United States
Wireless Analog Technology Center, Texas Instrument Incorporated, Dallas, TX 75243, United States
ISSN:
0018-9200
Rights:
Copyright 2006 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Electronics
Accession Number:
edscal.17724552
Database:
PASCAL Archive

Weitere Informationen

A single chip quad-band multi-mode (GSM900/ DCS1800/PCS1900/CDMA2K) direct-conversion RF receiver with integrated baseband ADCs is presented. The fully integrated RF receiver is implemented in a 90-nm single poly, six level metal, standard digital CMOS process with no additional analog and RF components. The highly digital multi-mode receiver uses minimum analog filtering and AGC stages, digitizing useful signal, dynamic DC offsets and blockers at the mixer output. The direct-conversion GSM front-end utilizes resistive loaded LNAs with only two coupled inductors per LNA. The GSM front-end achieves a 31.5 dB gain and a 2.1 dB integrated noise figure with a 5 dB noise figure under blocking conditions. The CDMA2K front-end utilizes a self-biased common-gate input amplifier followed by passive mixers, achieving wideband input matching from 900 MHz up to 2.1 GHz with an IIP3 of +8 dBm. The GSM receiver consumes 38 mA from a power supply of 1.5 V and CDMA2K receiver consumes 16 mA in the low band and 21 mA in the high band. The multi-mode receiver, including LO buffers and frequency dividers, ADCs, and reference buffers, occupies 2.5 mm2.