Treffer: SCR-based ESD protection in nanometer SOI technologies

Title:
SCR-based ESD protection in nanometer SOI technologies
Authors:
MARICHAL, Olivier, WYBO, Geert, VAN CAMP, Benjamin, VANYSACKER, Pieter, KEPPENS, Bart
Source:
Microelectronics and reliability. 47(7):1060-1068
Publisher Information:
Oxford: Elsevier, 2007.
Publication Year:
2007
Physical Description:
print, 7 ref
Original Material:
INIST-CNRS
Subject Terms:
Electronics, Electronique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Dispositifs à structure composée, Compound structure devices, Diodes, Autres dispositifs multijonctions. Transistors de puissance. Thyristors, Other multijunction devices. Power transistors. Thyristors, Circuits intégrés, Integrated circuits, Conception. Technologies. Analyse fonctionnement. Essais, Design. Technologies. Operation analysis. Testing, Diode, Diodo, Dispositif protection, Protective device, Dispositivo protección, Décharge électrostatique, Electrostatic discharge, Evaluation performance, Performance evaluation, Evaluación prestación, Haute performance, High performance, Alto rendimiento, Implémentation, Implementation, Implementación, Propriété physique, Physical properties, Propiedad física, Structure MOS, MOS structure, Estructura MOS, Technologie MOS complémentaire, Complementary MOS technology, Tecnología MOS complementario, Technologie silicium sur isolant, Silicon on insulator technology, Tecnología silicio sobre aislante, Thyristor, Tiristor
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Sarnoff Europe, Brugse Baan 188A, 8470 Gistel, Belgium
ISSN:
0026-2714
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=18835143
Rights:
Copyright 2007 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Electronics
Accession Number:
edscal.18835143
Database:
PASCAL Archive

Weitere Informationen

This paper introduces an SCR-based ESD protection design for silicon-on-insulator (SOI) technologies. SCR devices or thyristors, as they are sometimes better known, have long since been used in Bulk CMOS to provide very area efficient, high performance ESD protection for a wide variety of circuit applications. The special physical properties and design of an SOI technology however, renders straightforward implementation of an SCR in such technologies impossible. This paper discusses these difficulties and presents an approach to construct efficient SCR devices in SOI. These devices outperform MOS-based ESD protection devices by about four times, attaining roughly the same performance as diodes. Experimental data from two 65 nm and one 130 nm SOI technologies is presented to support this.