Result: The impact of mobility enhanced technology on device performance and reliability for sub-90nm SOI nMOSFETs
Title:
The impact of mobility enhanced technology on device performance and reliability for sub-90nm SOI nMOSFETs
Authors:
Source:
INFOS 2007: Proceedings of the 15th Biennial Conference on Insulating Films on Semiconductors, June 20-23, 2007, Glyfada Athens, GreeceMicroelectronic engineering. 84(9-10):2077-2080
Publisher Information:
Amsterdam: Elsevier Science, 2007.
Publication Year:
2007
Physical Description:
print, 3 ref
Original Material:
INIST-CNRS
Subject Terms:
Electronics, Electronique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Transistors, Contrainte contact, Contact stress, Tensión contacto, Contrainte traction, Tensile stress, Tensión traccíon, Courant induit, Induced current, Corriente inducida, Endommagement, Damaging, Deterioración, Evaluation performance, Performance evaluation, Evaluación prestación, Fiabilité, Reliability, Fiabilidad, Technologie NMOS, NMOS technology, Tecnología NMOS, Technologie silicium sur isolant, Silicon on insulator technology, Tecnología silicio sobre aislante, Technologie tranchée, Trench technology, Tecnología trinchera, Transistor MOSFET, MOSFET, Contact etch stop layer, STI-induced edge current
Document Type:
Conference
Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Department of Electrical Engineering, National University of Kaohsiung, Tawain, Province of China
No. 700, Kaohsiung University Rd, Nan-Tzu Dist., Kaohsiung, Tawain, Province of China
No. 700, Kaohsiung University Rd, Nan-Tzu Dist., Kaohsiung, Tawain, Province of China
ISSN:
0167-9317
Rights:
Copyright 2007 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Electronics
Accession Number:
edscal.18853513
Database:
PASCAL Archive
Further Information
For SOI nMOSFET, the impact of high tensile stress contact etch stop layer (CESL) on device performance and reliability was investigated. In this work, device driving capability can be enhanced with thicker CESL, larger LOD and narrower gate width. With electrical and body potential inspection, serious device's degradation happened on SOI-MOSFET with narrow gate device because of STI-induced edge current.