Result: Translational lemmas for DLOGTIME-uniform circuits, alternating TMs, and PRAMs

Title:
Translational lemmas for DLOGTIME-uniform circuits, alternating TMs, and PRAMs
Authors:
IWAMOTO, Chuzo, HATAYAMA, Naoki, NAKASHIBA, Yoshiaki, MORITA, Kenichi, IMAI, Katsunobu
Source:
Acta informatica. 44(5):345-359
Publisher Information:
Berlin: Springer, 2007.
Publication Year:
2007
Physical Description:
print, 20 ref
Original Material:
INIST-CNRS
Subject Terms:
Computer science, Informatique, Sciences exactes et technologie, Exact sciences and technology, Sciences et techniques communes, Sciences and techniques of general use, Mathematiques, Mathematics, Logique mathématique, fondements, théorie des ensembles, Mathematical logic, foundations, set theory, Logique et fondements, Logic and foundations, Récursivité, Recursion theory, Sciences appliquees, Applied sciences, Informatique; automatique theorique; systemes, Computer science; control theory; systems, Informatique théorique, Theoretical computing, Algorithmique. Calculabilité. Arithmétique ordinateur, Algorithmics. Computability. Computer arithmetics, Divers, Miscellaneous, Calcul parallèle, Parallel computation, Cálculo paralelo, Circuit ET, AND circuit, Circuito Y, Espace temps, Space time, Espacio tiempo, Hiérarchie, Hierarchy, Jerarquía, Informatique théorique, Computer theory, Informática teórica, Nombre entier, Integer, Entero, Processeur, Processor, Procesador, Profondeur, Depth, Profundidad, Symbole, Symbol, Símbolo, 03D55, 68Q10, Modèle calcul, Parallel Random Access Machine
Document Type:
Academic journal Article
File Description:
text
Language:
English
Author Affiliations:
Graduate School of Engineering, Hiroshima University, 739-8527 Hiroshima, Japan
Sharp Corporation, Osaka 545-8522, Japan
Mitsubishi Electric Corporation, Tokyo 100-8310, Japan
ISSN:
0001-5903
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=18986213
Rights:
Copyright 2008 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems

Mathematics
Accession Number:
edscal.18986213
Database:
PASCAL Archive

Further Information

We present translational lemmas for the three standard models of parallel computation, and apply them to obtain tight hierarchy results. It is shown that, for arbitrarily small rational constant e > 0, (i) there is a language which can be accepted by a UE-uniform circuit family of depth c(1 + ∈)(log n)r1 and size dnr2(1+∈) but not by any UE-uniform circuit family of depth c(log n)r1 and size dnr2, (ii) there is a language which can be accepted by a c(9 + ∈) (log n)r1 -time d(4 + ∈) log n-space ATM with l worktapes but not by any c(log n)r1 -time d log n-space ATM with the same I worktapes if the number of tape symbols is fixed, and (iii) there is a language which can be accepted by a c(1 + ∈)(log n)r1 -time PRAM with dnr2(1+∈) processors but not by any c(log n)r1 -time PRAM with dnr2 processors. Here, c > 0, d ≥ 1, r1 > 1, and r2 ≥ 1 are arbitrary rational constants, and l ≥ 2 is an arbitrary integer.