• Yield evaluation of 10-kA/cm2...

Treffer: Yield evaluation of 10-kA/cm2 Nb multi-layer fabrication process using conventional superconducting RAMs

Title:
Yield evaluation of 10-kA/cm2 Nb multi-layer fabrication process using conventional superconducting RAMs
Authors:
NAGASAWA, Shuichi, SATOH, Tetsuro, HINODE, Kenji, KITAGAWA, Yoshihiro, HIDAKA, Mutsuo
Source:
The 2006 applied superconductivity conference, Seattle, WA, August 27-September 1, 2006IEEE transactions on applied superconductivity. 17(2):177-180
Publisher Information:
New York, NY: Institute of Electrical and Electronics Engineers, 2007.
Publication Year:
2007
Physical Description:
print, 10 ref 1
Original Material:
INIST-CNRS
Subject Terms:
Electronics, Electronique, Electrical engineering, Electrotechnique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Electronique, Electronics, Appareillage électronique et fabrication. Composants passifs, circuits imprimés, connectique, Electronic equipment and fabrication. Passive components, printed wiring boards, connectics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Conception. Technologies. Analyse fonctionnement. Essais, Design. Technologies. Operation analysis. Testing, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Circuits électriques, optiques et optoélectroniques, Electric, optical and optoelectronic circuits, Propriétés des circuits, Circuit properties, Circuits électroniques, Electronic circuits, Circuits numériques, Digital circuits, Capacité mémoire, Memory capacity, Capacidad memoria, Circuit intégré supraconducteur, Superconducting integrated circuits, Circuit intégré, Integrated circuit, Circuito integrado, Circuit logique supraconducteur, Superconducting logic circuits, Dispositif supraconducteur, Superconductor device, Dispositivo supraconductor, Diélectrique, Dielectric materials, Dieléctrico, Détection défaut, Defect detection, Detección imperfección, Electronique quantique, Quantum electronics, Fiabilité, Reliability, Fiabilidad, Implantation circuit, Circuit layout, Isolateur, Insulator, Aislador, Logique quantique, Quantum logic, Lógica cuántica, Multicouche, Multiple layer, Capa múltiple, Mémoire accès direct, Random access memory, Memoria acceso directo, Mémoire supraconductrice, Superconductor memory, Memoria supraconductora, Paramètre circuit, Circuit parameter, Parámetro circuito, Planarisation, Planarization, Planarización, Planning installation, Plant layout, Proyecto instalación, Procédé fabrication, Manufacturing process, Procedimiento fabricación, Résistance électrique, Resistor, Resistencia eléctrica(componente), -Niobium, planarization technique, random access memories, reliability, superconducting device fabrication
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Superconductivity Research Laboratory, ISTEC, 34 Miyukigaoka, Tsukuba, Ibaraki 305-8501, Japan
ISSN:
1051-8223
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=19010169
Rights:
Copyright 2007 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Electronics
Accession Number:
edscal.19010169
Database:
PASCAL Archive

Weitere Informationen

To achieve larger scale and higher speed single flux quantum (SFQ) circuits, we have been developing a 10-kA/cm2 Nb multi-layer fabrication process composed of more than six planarized Nb layers, an Nb/AlOx/Nb junction layer, a Mo resistor layer, and SiO2 insulator layers. To evaluate reliability of the fabrication process, we have designed superconducting random access memories (RAMs) with four different memory capacities: 256,1K, 4K, and 16K bits. Although the circuit configuration of these RAMs is almost the same as that of previously developed ones that have conventional latching devices, we modified the circuit parameters and layout design based on specifications of the new fabrication process. We have obtained operations for the 256-bit RAM with a bit yield of 100%, the 1K-bit RAM with a bit yield of 99.8%, and the 4K-bit RAM with a bit yield of 96.7%. The number of defects in the 4K-bit RAM was estimated to be approximately 10. We confirmed that evaluations using the RAMs were effective at detecting defects due to the fabrication process.