• Recent progress in SFQ device...

Treffer: Recent progress in SFQ device technologies in Japan

Title:
Recent progress in SFQ device technologies in Japan
Authors:
TANABE, Keiichi, HIDAKA, Mutsuo
Source:
The 2006 applied superconductivity conference, Seattle, WA, August 27-September 1, 2006IEEE transactions on applied superconductivity. 17(2):494-499
Publisher Information:
New York, NY: Institute of Electrical and Electronics Engineers, 2007.
Publication Year:
2007
Physical Description:
print, 48 ref 1
Original Material:
INIST-CNRS
Subject Terms:
Electronics, Electronique, Electrical engineering, Electrotechnique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Conception. Technologies. Analyse fonctionnement. Essais, Design. Technologies. Operation analysis. Testing, Dispositifs supraconducteurs, Superconducting devices, Circuits électriques, optiques et optoélectroniques, Electric, optical and optoelectronic circuits, Propriétés des circuits, Circuit properties, Circuits électroniques, Electronic circuits, Circuits numériques, Digital circuits, Circuits de commutation, de multiplexage, à capacités commutées, Switching, multiplexing, switched capacity circuits, Circuit intégré supraconducteur, Superconducting integrated circuits, Circuit logique supraconducteur, Superconducting logic circuits, Commutateur, Selector switch, Conmutador, Conception assistée, Computer aided design, Concepción asistida, Conception circuit, Circuit design, Diseño circuito, Convertisseur AN, AD converter, Convertidor AN, Dispositif supraconducteur, Superconductor device, Dispositivo supraconductor, Echantillonneur, Sampler, Muestreador, Electronique quantique, Quantum electronics, Implantation circuit, Circuit layout, Implantation(topométrie), Layout, Implantación(topometría), Jonction Josephson, Josephson junction, Unión Josephson, Jonction rampe, Step edge junction, Unión rampa, Logique quantique, Quantum logic, Lógica cuántica, Module multipuce, Multichip module, Modulo multipulga, Multicouche, Multiple layer, Capa múltiple, Packaging électronique, Electronic packaging, Packaging electrónico, Planarisation, Planarization, Planarización, Prototype, Prototipo, Puce électronique, Chip, Pulga electrónica, Structure petite échelle, Small scale structure, Estructura pequeña escala, Supraconducteur haute température, High temperature superconductor, Supraconductor alta temperatura, Digital circuits, high-temperature superconductors, niobium, packaging, superconducting devices
Subject Geographic:
Asie, Asia, Japon, Japan, Japón
Document Type:
Konferenz Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Superconductivity Research Laboratory, ISTEC, 1-10-13 Shinonome, Koto-ku, Tokyo 135-0062, Japan
Superconductivity Research Laboratory, ISTEC, 34 Miyukigaoka, Tsukuba, Ibaraki 305-8501, Japan
ISSN:
1051-8223
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=19010243
Rights:
Copyright 2007 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Electronics
Accession Number:
edscal.19010243
Database:
PASCAL Archive

Weitere Informationen

Recent progress in single flux quantum (SFQ) device technologies in Japan is described, mainly focusing on those developed in the NEDO Superconductors Network Device Project which includes developments of both LTS and HTS devices. The advanced Nb process which consists of a planarized structure with nine Nb layers and 10 kA/cm2 Josephson junctions (JJs) has been developed. This enables fabrication of chips including 100,000 JJs and operating frequency up to 80 GHz. We have also developed the CAD tool by which one can generate SFQ circuit layouts including about 400,000 JJs from logic descriptions. For demonstration of a small-scale switch system, a 4 x 4 switch chip, a 117 Gbps multi-chip-module (MCM) technology, and a packaging technology with 32-ch 10 Gbps I/Os to an MCM have been developed. By using the multilayer process with three HTS epitaxial layers and interface-engineered ramp-edge JJs, we demonstrated operation of SFQ circuits with up to 200 JJs. A variety of elementary SFQ circuits such as a T-FF and a 1:2 switch required for an A/D converter front-end circuit have been designed based on a new layout method, and their operation at 30-50 K has been confirmed. A prototype sampler system is being developed for demonstration of bandwidth over 100 GHz for optical input signals.