Result: Instruction selection for ARM/thumb processors based on a multi-objective ant algorithm

Title:
Instruction selection for ARM/thumb processors based on a multi-objective ant algorithm
Source:
Computer science (theory and applications)0CSR 2006. :641-651
Publisher Information:
Berlin: Springer, 2006.
Publication Year:
2006
Physical Description:
print, 17 ref 1
Original Material:
INIST-CNRS
Document Type:
Conference Conference Paper
File Description:
text
Language:
English
Author Affiliations:
School of Computer Science, National University of Defense Technology, 410073, Changsha, China
ISSN:
0302-9743
Rights:
Copyright 2007 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Computer science; theoretical automation; systems
Accession Number:
edscal.19150290
Database:
PASCAL Archive

Further Information

In the embedded domain, not only performance, but also memory and energy are important concerns. A dual instruction set ARM processor, which supports a reduced Thumb instruction set with a smaller instruction length in addition to a full instruction set, provides an opportunity for a flexible tradeoff between these requirements. For a given program, typically the Thumb code is smaller than the ARM code, but slower than the latter, because a program compiled into the Thumb instruction set executes a larger number of instructions than the same program compiled into the ARM instruction set. Motivated by this observation, we propose a new Multi-objective Ant Colony Optimization (MOACO) algorithm that can be used to enable a flexible tradeoff between the code size and execution time of a program by using the two instruction sets selectively for different parts of a program. Our proposed approach determines the instruction set to be used for each function using a subset selection technique, and the execution time is the total one based on the profiling analyses of the dynamic behavior of a program. The experimental results show that our proposed technique can be effectively used to make the tradeoff between a program's code size and execution time and can provide much flexibility in code generation for dual instruction set processors in general.