Treffer: Hardening an AMBA-AXI Network Interface for a Reliable Network-on-Chip

Title:
Hardening an AMBA-AXI Network Interface for a Reliable Network-on-Chip
Contributors:
Universidade do Vale do Itajaí (UNIVALI), Radiations et composants (RADIAC), Institut d’Electronique et des Systèmes (IES), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), Fiabilité et Systèmes en Environnements Contraints (FSEC)
Source:
IEEE Latin American Symposium on Circuits and Systems (LASCAS). :1-5
Publisher Information:
CCSD; IEEE, 2025.
Publication Year:
2025
Collection:
collection:CNRS
collection:IES
collection:UNIV-MONTPELLIER
collection:UM-2015-2021
collection:UM-EPE
Subject Geographic:
Original Identifier:
HAL: hal-04930198
Document Type:
Konferenz conferenceObject<br />Conference papers
Language:
English
Relation:
info:eu-repo/semantics/altIdentifier/doi/10.1109/LASCAS64004.2025.10966348
DOI:
10.1109/LASCAS64004.2025.10966348
Rights:
info:eu-repo/semantics/OpenAccess
Accession Number:
edshal.hal.04930198v1
Database:
HAL

Weitere Informationen

Systems-on-chip (SoCs) used in space and critical environments feature increasing cores. Because of the environment in which these systems operate, they must use fault tolerance techniques to improve reliability. XINA (eXtensible Interconnect Network Architecture) is a reliable network-on-chip for space systems, which has already been verified and tested. However, a network interface (NI) must provide communication services for its effective use in real systems. Therefore, this work presents the development of a fault-tolerant NI compatible with the XINA that implements communication services commonly adopted in SoCs. The NI implements the AMBA-AXI 5 communication protocol to facilitate and accelerate the core integration process with XINA. We present a standard and a fault-tolerant version of the NI using TMR (Triple Modular Redundancy) and Hamming ECC (Error Correction Code) techniques in its internal components. The fault-tolerant interfaces reduced the error propagation by up to 16.7× compared to the standard versions, at a price of 82% more LUTs (Look-Up-Tables) and 23% more FFs (Flip-Flops) on average.