Pramanik, A. K., Pal, J., & Sen, B. (2025). Analysis of fault tolerance capability of QCA circuit under regular clocking. International Journal of Electronics, 112(11), 2449-2471. https://doi.org/10.1080/00207217.2025.2450738
ISO-690 (author-date, English)PRAMANIK, Amit Kumar, PAL, Jayanta und SEN, Bibhash, 2025. Analysis of fault tolerance capability of QCA circuit under regular clocking. International Journal of Electronics. 1 November 2025. Vol. 112, no. 11, p. 2449-2471. DOI 10.1080/00207217.2025.2450738.
Modern Language Association 9th editionPramanik, A. K., J. Pal, und B. Sen. „Analysis of Fault Tolerance Capability of QCA Circuit under Regular Clocking.“. International Journal of Electronics, Bd. 112, Nr. 11, November 2025, S. 2449-71, https://doi.org/10.1080/00207217.2025.2450738.
Mohr Siebeck - Recht (Deutsch - Österreich)Pramanik, Amit Kumar/Pal, Jayanta/Sen, Bibhash: Analysis of fault tolerance capability of QCA circuit under regular clocking., International Journal of Electronics 2025, 2449-2471.
Emerald - HarvardPramanik, A.K., Pal, J. und Sen, B. (2025), „Analysis of fault tolerance capability of QCA circuit under regular clocking.“, International Journal of Electronics, Vol. 112 No. 11, S. 2449-2471.