Result: Bin-VBSR: Variable Block Size Binned Block-Compressed Sparse Row for Efficient GPU-Accelerated Finite Element Analysis

Title:
Bin-VBSR: Variable Block Size Binned Block-Compressed Sparse Row for Efficient GPU-Accelerated Finite Element Analysis
Authors:
Pfeil, Florian, Ferreira, Stephanie, Mueller-Roemer, Johannes Sebastian
Publisher Information:
Fraunhofer-Gesellschaft, 2025.
Publication Year:
2025
Subject Terms:
FEM Simulation, Parallel algorithms, Branche: Manufacturing and Mobility, LTA: Machine intelligence, algorithms, and data structures (incl. semantics), Research Line: (Interactive) simulation (SIM), Matrix representation, General Purpose Computation on Graphics Processing Unit (GPGPU)
Document Type:
Conference Conference object
Language:
English
DOI:
10.24406/publica-5573
Accession Number:
edsair.doi...........38fad80648d5747d22723a0355c7fa20
Database:
OpenAIRE

Further Information

We present Binned Variable Block Compressed Sparse Row (Bin-VBSR), a novel GPU-optimized sparse matrix data structure and associated sparse matrix-vector multiplication algorithm for matrices with variable-size dense blocks. This includes a novel approach to handling long rows in the Binned Compressed Sparse Row (Bin-CSR) family of GPU-optimized sparse matrix data structures. We demonstrate speedups of up to 9.9× over Bin-BCSR* and extend its data compression advantages over compressed sparse row (CSR) to variable block size, resulting in an improvement of up to 50%.