MYOREN, H., KISHITA, N., TAINO, T., & TAKADA, S. (2007, Januar 1). Minimization of parasitic inductances in SFQ circuits using over-and under-ground planes. 17(2). New York, NY: Institute of Electrical and Electronics Engineers, 2007. Abgerufen von http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=19010235
ISO-690 (author-date, English)MYOREN, Hiroaki, KISHITA, Noriaki, TAINO, Tohru und TAKADA, Susumu, 2007. Minimization of parasitic inductances in SFQ circuits using over-and under-ground planes. In: [online]. New York, NY: Institute of Electrical and Electronics Engineers, 2007. 1 Januar 2007. Available from: http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=19010235
Modern Language Association 9th editionMYOREN, H., N. KISHITA, T. TAINO, und S. TAKADA. Minimization of parasitic inductances in SFQ circuits using over-and under-ground planes. Nr. 2, New York, NY: Institute of Electrical and Electronics Engineers, 2007., 2007, http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=19010235.
Mohr Siebeck - Recht (Deutsch - Österreich)Emerald - Harvard
MYOREN, H., KISHITA, N., TAINO, T. und TAKADA, S. (2007), „Minimization of parasitic inductances in SFQ circuits using over-and under-ground planes“, in , Bd. 17, New York, NY: Institute of Electrical and Electronics Engineers, 2007., verfügbar unter: http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=19010235.