JACOB, P., ZIA, A., ERDOGAN, O., BELEMJIAN, P. M., KIM, J.-W., CHU, M., KRAFT, R. P., MCDONALD, J. F., & BERNSTEIN, K. (2009). Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks : Simulations indicate that 3-D stacking of memory chips can overcome memory limitations on computer processing by allowing for faster clock rates or improved transfer of data and address information. 3-D Integration Technologies, 97(1), 108-122.

JACOB, Philip, ZIA, Aamir, ERDOGAN, Okan, BELEMJIAN, Paul M, KIM, Jin-Woo, CHU, Michael, KRAFT, Russell P, MCDONALD, John F und BERNSTEIN, Kerry, 2009. Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks : Simulations indicate that 3-D stacking of memory chips can overcome memory limitations on computer processing by allowing for faster clock rates or improved transfer of data and address information. 3-D Integration Technologies. 1 Januar 2009. Vol. 97, no. 1, p. 108-122.

JACOB, P., A. ZIA, O. ERDOGAN, P. M. BELEMJIAN, J.-W. KIM, M. CHU, R. P. KRAFT, J. F. MCDONALD, und K. BERNSTEIN. „Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks : Simulations Indicate That 3-D Stacking of Memory Chips Can Overcome Memory Limitations on Computer Processing by Allowing for Faster Clock Rates or Improved Transfer of Data and Address Information“. 3-D Integration Technologies, Bd. 97, Nr. 1, Januar 2009, S. 108-22.

JACOB, Philip/ZIA, Aamir/ERDOGAN, Okan/BELEMJIAN, Paul M/KIM, Jin-Woo/CHU, Michael u. a.: Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks : Simulations indicate that 3-D stacking of memory chips can overcome memory limitations on computer processing by allowing for faster clock rates or improved transfer of data and address information, 3-D Integration Technologies 2009, 108-122.

JACOB, P., ZIA, A., ERDOGAN, O., BELEMJIAN, P.M., KIM, J.-W., CHU, M., KRAFT, R.P., MCDONALD, J.F. und BERNSTEIN, K. (2009), „Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks : Simulations indicate that 3-D stacking of memory chips can overcome memory limitations on computer processing by allowing for faster clock rates or improved transfer of data and address information“, 3-D Integration Technologies, Vol. 97 No. 1, S. 108-122.