• FPGA Accelerated Parallel HsCl...

Result: FPGA Accelerated Parallel HsClone GA for Digital Circuit Configuration in CGP Format

Title:
FPGA Accelerated Parallel HsClone GA for Digital Circuit Configuration in CGP Format
Authors:
Malhotra, GayatriAff1, Aff2, IDs40031023009188_cor1, Duraiswamy, Punithavathi, Kishore, J. K.
Source:
Journal of The Institution of Engineers (India): Series B: Electrical, Electronics & Telecommunication and Computer Engineering. 104(5):1079-1089
Database:
Springer Nature Journals