Result: 0.5-V Low-VT CMOS Preamplifier for Low-Power and High-Speed Gigabit-DRAM Arrays

Title:
0.5-V Low-VT CMOS Preamplifier for Low-Power and High-Speed Gigabit-DRAM Arrays
Authors:
KOTABE, Akira, YANAGAWA, Yoshimitsu, AKIYAMA, Satoru, SEKIGUCHI, Tomonori
Source:
IEEE journal of solid-state circuits. 45(11):2348-2355
Publisher Information:
New York, NY: Institute of Electrical and Electronics Engineers, 2010.
Publication Year:
2010
Physical Description:
print, 8 ref
Original Material:
INIST-CNRS
Subject Terms:
Electronics, Electronique, Sciences exactes et technologie, Exact sciences and technology, Sciences appliquees, Applied sciences, Electronique, Electronics, Electronique des semiconducteurs. Microélectronique. Optoélectronique. Dispositifs à l'état solide, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, Circuits intégrés, Integrated circuits, Conception. Technologies. Analyse fonctionnement. Essais, Design. Technologies. Operation analysis. Testing, Circuits intégrés par fonction (dont mémoires et processeurs), Integrated circuits by function (including memories and processors), Stockage et lecture de l'information, Storage and reproduction of information, Mémoires de masse magnétiques et optiques, Magnetic and optical mass memories, Mémoire accès direct, Random access memory, Memoria acceso directo, Mémoire non volatile, Non volatile memory, Memoria no volátil, Basse tension, Low voltage, Baja tensión, Circuit intégré, Integrated circuit, Circuito integrado, Circuit périphérique, Peripheral circuit, Circuito periférico, Dispositif à mémoire, Memory devices, Electronique faible puissance, Low-power electronics, Mémoire accès direct dynamique, Dynamic random access memory, Préamplificateur, Preamplifier, Preamplificador, Technologie MOS complémentaire, Complementary MOS technology, Tecnología MOS complementario, Temps exécution, Execution time, Tiempo ejecución, Amplificateur de détection, Sense amplifier, DRAM, low voltage, preamplifier, sense amplifier (SA)
Document Type:
Conference Conference Paper
File Description:
text
Language:
English
Author Affiliations:
Measurement Systems Research Department, Cen tral Research Laboratory, Hitachi, Ltd., Tokyo 185-8601, Japan
ISSN:
0018-9200
Access URL:
http://pascal-francis.inist.fr/vibad/index.php?action=search&terms=23387572
Rights:
Copyright 2015 INIST-CNRS
CC BY 4.0
Sauf mention contraire ci-dessus, le contenu de cette notice bibliographique peut être utilisé dans le cadre d’une licence CC BY 4.0 Inist-CNRS / Unless otherwise stated above, the content of this bibliographic record may be used under a CC BY 4.0 licence by Inist-CNRS / A menos que se haya señalado antes, el contenido de este registro bibliográfico puede ser utilizado al amparo de una licencia CC BY 4.0 Inist-CNRS
Notes:
Electronics
Accession Number:
edscal.23387572
Database:
PASCAL Archive

Further Information

A novel low-VT CMOS preamplifier was developed for low-power and high-speed gigabit DRAM arrays. The sensing time of a sense amplifier (SA) with the proposed preamplifier and its activation schemes at a data-line voltage of 0.5 V was 6 ns, which is 62% shorter than that of an SA using a conventional preamplifier. By activating the proposed preamplifier temporarily during the write cycle, the writing time was 16.3 ns, which is 72% shorter than the case without activation of the proposed preamplifier, and this time is short enough to apply a DRAM array using the proposed preamplifier to 1.6-Gbit/s/pin DDR3 SDRAM. The operating current of the memory array and its peripheral circuit including the proposed preamplifier was reduced by 12% by reducing the data-line voltage from 0.8 to 0.5 V.