LEON, A. S., TAM, K. W., SHIN, J. L., WEISNER, D., & SCHUMACHER, F. (2007, January 1). A power-efficient high-throughput 32-thread SPARC processor. 42(1). New York, NY: Institute of Electrical and Electronics Engineers, 2007. Retrieved from http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=18401868
ISO-690 (author-date, English)LEON, Ana Sonia, TAM, Kenway W, SHIN, Jinuk Luke, WEISNER, David and SCHUMACHER, Francis, 2007. A power-efficient high-throughput 32-thread SPARC processor. In: [online]. New York, NY: Institute of Electrical and Electronics Engineers, 2007. 1 January 2007. Available from: http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=18401868
Modern Language Association 9th editionLEON, A. S., K. W. TAM, J. L. SHIN, D. WEISNER, and F. SCHUMACHER. A power-efficient high-throughput 32-thread SPARC processor. no. 1, New York, NY: Institute of Electrical and Electronics Engineers, 2007., 2007, http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=18401868.
Mohr Siebeck - Recht (Deutsch - Österreich)Emerald - Harvard
LEON, A.S., TAM, K.W., SHIN, J.L., WEISNER, D. and SCHUMACHER, F. (2007), “A power-efficient high-throughput 32-thread SPARC processor”, in , Vol. 42, New York, NY: Institute of Electrical and Electronics Engineers, 2007., available at: http://pascal-francis.inist.fr/vibad ndex.php?action=search&terms=18401868.